SpacemiT Launches RISC-V Server CPU V100 Alongside Three Server Platforms

At the 6th RISC-V China Summit held in Shenzhen on October 19, 2026, SpacemiT unveiled its server-class CPU V100, accompanied by three server platforms: the C2201 computing server, G5201 AI-accelerated server, and S5236 storage server. According to the company, the V100 is the industry's first general-purpose chip to fully comply with RISC-V server specifications.

The V100 adopts a 46-core hybrid architecture, integrating six Xiangshan Kunminghu V2R2 cores and 40 in-house X100 cores, with dual-socket interconnect scaling up to 92 cores. Its memory and PCIe expansion capabilities are designed for connecting accelerators, networking, and storage devices. The chip covers five server specification areas, including RVA23, server SoC, server platform, boot and runtime services, and security model, with all boot and runtime service tests passed. This allows V100 to directly run mainstream Linux distributions without requiring specialized OS customization.

The newly launched server platforms target general computing, AI acceleration, and mass data storage respectively. The G5201 supports eight double-width accelerator cards, while supporting server motherboards, firmware, system management, and hardware reference designs can help partners reduce duplicate development and speed up product validation and deployment.

SpacemiT is a computing chip company focused on the RISC-V architecture, previously releasing the K1 and K3 chips for terminal devices. With V100, its product line extends from the edge to cloud server applications. Red Hat's RHEL 10.2 RISC-V developer preview hardware list, updated in October 2026, also includes the V100, indicating the chip has entered the development and adaptation scope of an international software vendor.